Das Team des Fachgebietes Digitaltechnik
Dr.-Ing. Martin Kumm
Wissenschaftlicher Mitarbeiter (Post-Doc)
Anschrift
Wilhelmshöher Allee 73
34121 Kassel
Gebäude: WA-altes Gebäude (WA 73)
34121 Kassel
Gebäude: WA-altes Gebäude (WA 73)
Raum
0330
Telefon +49 561 804 6470
Telefax +49 561 804 6373
E-Mail-Adresse kumm@uni-kassel.de
Webseite http://www.martin-kumm.de
Veröffentlichungen
2018
- Patrick Sittel, Julian Oppermann, Martin Kumm, Andreas Koch and Peter Zipf: HatScheT: A Contribution to Agile HLS, Accepted for presentation In: FPGAs for Software Programmers (FSP), Dublin August 2018.
- Patrick Sittel, Martin Kumm, Julian Oppermann, Konrad Möller, Peter Zipf, Andreas Koch: ILP-based Modulo Scheduling and Binding for Register Minimization. Accepted for presentation at the 28th International Conference on Field Programmable Logic and Application (FPL), 2018
- Martin Kumm, Oscar Gustafson, Florent de Dinechin, Johannes Kappauf and Peter Zipf, Karatsuba with Rectangular Multipliers for FPGAs, IEEE Symposium on Computer Arithmetic (ARITH), 2018, received the best paper award!
- Martin Kumm: Optimal Constant Multiplication using Integer Linear Programming, IEEE Transactions on Circuits and Systems II: Express Briefs, Volume 65, Issue 5, May 2018, (preprint, copyright IEEE), DOI.
- Konrad Möller, Martin Kumm, Mario Garrido, Peter Zipf: Optimal Shift Reassignment in Reconfigurable Constant Multiplication Circuits.In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 37, Issue: 3, p710-714, March 2018, 10.1109/TCAD.2017.2729467
- Patrick Sittel, Thomas Schönwälder, Martin Kumm and Peter Zipf: ScaLP: A Light-Weighted (MI)LP-Library, 21. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), March 2018, Tübingen.
- Martin Kumm and Johannes Kappauf: Advanced Compressor Tree Synthesis for FPGAs, IEEE Transactions on Computers, Volume 67, Issue 8, Aug. 2018, (preprint, copyright IEEE), DOI.
- Martin Kumm, Oscar Gustafsson, Mario Garrido and Peter Zipf: Optimal Single Constant Multiplication using Ternary Adders, IEEE Transactions on Circuits and Systems-II: Express Briefs, Volume 65, Issue 7, July 2018 (doi.org/10.1109/TCSII.2016.2631630)
2017
- Martin Kumm, Johannes Kappauf, Matei Istoan and Peter Zipf: Optimal Design of Large Multipliers for FPGAs. IEEE Symposium on Computer Arithmetic (ARITH), 2017, preprint
- Martin Kumm, Martin Hardieck and Peter Zipf: Optimization of Constant Matrix Multiplication with Low Power and High Throughput, IEEE Transaction on Computers, Volume 66, Issue 12, 2017, https://doi.org/10.1109/TC.2017.2701365, preprint
- Patrick Sittel, Martin Kumm, Konrad Möller, Martin Hardieck and Peter Zipf: High-Level Synthesis for Model-Based Design with Automatic Folding including Combined Common Subcircuits, In: 20. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 103-113, Shaker Verlag, ISBN: 978-3-8440-4996-1, 2017, preprint
- Konrad Möller, Martin Kumm, Marco Kleinlein, Peter Zipf: Reconfigurable Constant Multiplication for FPGAs, In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 36, no. 6, pp. 927-937, 2017, dx.doi.org/10.1109/TCAD.2016.2614775
2016
- Konrad Möller, Martin Kumm, Marco Kleinlein, Peter Zipf: Reconfigurable Constant Multiplication for FPGAs, In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , vol., no., pp., 2016, (dx.doi.org/10.1109/TCAD.2016.2614775)
- M. Kumm, P. Zipf: Comment on “High Efficiency Generalized Parallel Counters for Look-Up Table Based FPGAs” International Journal of Reconfigurable Computing, 2016, Article ID 3015403, (dx.doi.org/10.1155/2016/3015403, open access)
- M. Kumm, M. Kleinlein, P. Zipf: Efficient Sum of Absolute Difference Computation on FPGAs IEEE International Conference on Field Programmable Logic and Application (FPL) 2016, Lausanne (preprint, copyright IEEE)
- U. Meyer-Baese, H. Muddu, S. Schinhaerl, M. Kumm, P. Zipf: Real-time Fetal ECG System Design using Embedded Microprocessors In: Proc. SPIE Commercial + Scientific Sensing and Imaging. Editors: Liyi Dai, Yufeng Zheng, Henry Chu, A. Meyer-Baese; April 2016, Vol. 9871, pp. 987106-1-14, doi.org/10.1117/12.2224256
- Mario Garrido, Petter Källström, Martin Kumm and Oscar Gustafson: CORDIC II: A New Improved CORDIC Algorithm In: IEEE Transactions on Circuits and Systems II: Express Briefs, 63(2), 186–190. 2016, doi.org/10.1109/TCSII.2015.2483422
2015
- Martin Kumm: Multiple Constant Multiplication Optimizations for Field Programmable Gate Arrays Dissertation, Defended: 30.10.2015, Published: 02.05.2016, Springer Wiesbaden, ISBN: 978-3-658-13322-1, doi.org/10.1007/978-3-658-13323-8 (in case you don't have access, ask for preprints)
- Konrad Möller, Martin Kumm, Charles-Frederic Müller, Peter Zipf: Model-based Hardware Design for FPGAs using Folding Transformations based on Subcircuits In: FPGAs for Software Programmers (FSP), 2015, arXiv:1508.06811 (preprint), Link to Benchmarks
- Mathias Faust, Martin Kumm, Chip-Hong Chang and Peter Zipf: Efficient Structural Adder Pipelining in Transposed Form FIR Filters In: 20th International Conference on Digital Signal Processing (DSP 2015), 2015 (preprint, copyright IEEE, dx.doi.org/10.1109/ICDSP.2015.7251882)
- Martin Kumm, Shahid Abbas and Peter Zipf: An Efficient Softcore Multiplier Architecture for Xilinx FPGAs In: 22nd IEEE Symposium on Computer Arithmetic (ARITH 22), 2015 (preprint, copyright IEEE, dx.doi.org/10.1109/ARITH.2015.17)
2014
- Martin Kumm and Peter Zipf: Pipelined Compressor Tree Optimization using Integer Linear Programming In: International Conference on Field Programmable Logic and Application (FPL), 2014 (preprint, copyright IEEE)
- Konrad Möller, Martin Kumm, Marco Kleinlein and Peter Zipf:
Pipelined Reconfigurable Multiplication with Constants on FPGAs
In: International Conference on Field Programmable Logic and Application (FPL), 2014 (preprint, copyright IEEE) - Konrad Möller, Martin Kumm, Björn Barschtipan and Peter Zipf:
Dynamically Reconfigurable Constant Multiplication on FPGAs
In: 17. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Cuvillier, 2014 (preprint, copyright Cuvillier Verlag) - Martin Kumm, Peter Zipf:
Efficient High Speed Compression Trees on Xilinx FPGAs
In: 17. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Cuvillier, 2014 (preprint, copyright Cuvillier Verlag)
2013
- Martin Kumm, Konrad Möller and Peter Zipf: Dynamically Reconfigurable FIR Filter Architectures with Fast Reconfiguration In: 8th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2013 (DOI or preprint, copyright IEEE)
- Martin Kumm, Martin Hardieck, Jens Willkomm, Peter Zipf and Uwe Meyer-Baese: Multiple Constant Multiplication with Ternary Adders
In: International Conference on Field Programmable Logic and Application (FPL), 2013 (DOI or preprint, copyright IEEE) - Martin Kumm, Diana Fanghänel, Konrad Möller, Peter Zipf and Uwe Meyer-Baese:
FIR Filter Optimization for Video Processing on FPGAs
In: EURASIP Journal on Advances in Signal Processing, Springer, 2013 (DOI open access) - Martin Kumm, Konrad Möller and Peter Zipf:
Reconfigurable FIR Filter Using Distributed Arithmetic on FPGAs
In: Circuits and Systems, International Symposium on (ISCAS), 2013 (DOI or preprint, copyright IEEE) - Martin Kumm, Konrad Möller and Peter Zipf:
Partial LUT Size Analysis in Distributed Arithmetic FIR Filters on FPGAs
In: Circuits and Systems, International Symposium on (ISCAS), 2013 (DOI or preprint, copyright IEEE)
2012
- Martin Kumm and Peter Zipf:
Hybrid Multiple Constant Multiplication for FPGAs
In: Electronics, Circuits and Systems, International Conference On (ICECS) 2012
(DOI or preprint, copyright IEEE) - Martin Kumm and Katharina Liebisch and Peter Zipf:
Reduced Complexity Single and Multiple Constant Multiplication in Floating Point Precision
In: Field Programmable Logic and Applications, International Conference on (FPL) 2012
(DOI or preprint, copyright IEEE) - Michael Kunz and Martin Kumm and Martin Heide and Peter Zipf
Area Estimation of Look-Up Table based Fixed-Point Computations on the example of a Real-Time High Dynamic Range Imaging System
In: Field Programmable Logic and Applications, International Conference on (FPL) 2012
(DOI or preprint, copyright IEEE) - Uwe Meyer-Baese and Guillermo Botella and David E. T. Romero and Martin Kumm:
Optimization of high speed pipelining in FPGA-based FIR filter design using genetic algorithm
In: Proceedings of SPIE 2012 (Vol. 8401)
(DOI, please ask for preprint) - Martin Kumm and Mathias Faust and Peter Zipf and Chip-Hong Chang: Pipelined Adder Graph Optimization for High Speed Multiple Constant Multiplication.
In: Circuits and Systems, International Symposium on (ISCAS) 2012.
(DOI or preprint, copyright IEEE)
2011
- Martin Kumm and Peter Zipf:
High Speed Low Complexity FPGA-based FIR Filters Using Pipelined Adder Graphs.
In: Field Programmable Technology, International Conference on (ICFPT), 12-14 Dec. 2011, pp. 1-4
(DOI or preprint, copyright IEEE)
2010
- Martin Kumm, Harald Klingbeil, Peter Zipf:
An FPGA-Based Linear All-Digital Phase-Locked Loop,
IEEE Transactions on Circuits an Systems-I: Regular Papers, 2010, pp. 2487-2497 (DOI or preprint, copyright IEEE)
2009
- Monika Mehler, Harald Klingbeil, Ulrich Laier, Klaus-Peter Ningel, Martin Kumm The Damping of Longitudinal Quadrupole Oscillations at GSI Proceedings of the Particle Accelerator Conference 2009
2008
- Martin Kumm, Shahab Sanjari: Digital Hilbert Transformers for FPGA-based Phase-Locked Loops In: International Conference on Field Programmable Logic and Applications (FPL), 2008, p. 251 (DOI or preprint, copyright IEEE)
2007
- Harald Klingbeil, Bernhard Zipfel, Martin Kumm, Peter Moritz A Digital Beam-Phase Control System for Heavy-Ion Synchrotrons In: IEEE Transactions on Nuclear Science, 2007, 54(6), 2604–2610. (DOI)
2006
- Andre Guntoro, Peter Zipf, Oliver Soffke, Harald Klingbeil, Martin Kumm, Manfred Glesner Implementation of Realtime and Highspeed Phase Detector on FPGA (Vol. 3985, pp. 1–11). Berlin, Heidelberg: Springer Berlin Heidelberg, 2006 (DOI)
