Selected chapters of computer architecture

Learning objectives:

• In-depth knowledge of the design of digital circuits
• VHDL design
• Implementation of simple architectures at FPGA level

Learning inhold:
Structure of computer architectures, VHDL implementations, FPGA programming

Prior knowledge:
Digital logic, computer architecture Course from 5th semester

Course number: FB16-6804

Place and time:
Wednesdays: 9:00 to 17:00 (2+2 SWS, total of 3 full hours of lecture time per week, the exact times will be announced after the meeting date!)
Room: 2107 (MSP laboratory of the department)

The preliminary meeting for the lecture will take place on 21.10.2015 at 10:00 am in room 2107!

Lecturer:
Prof. Dr.-Ing. habil. Josef Börcsök
Dr. Ali Hayek

Scope:
4 SWS or 6 CP

Contact:
Email to Dr. Ali Hayek

Written examination:
Oral or written examination, depending on the number of participants.
Dates will be given by arrangement.