1oo2 security architecture with 32-bit processor
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The system consists of two subsystems, 1oo2 Safety-System and 1oo1 Com-System
Safety system
- 2 x 32 bit IP cores
- 2 power domains
- Hardware comparator
- Peripheral devices
- Counter
- PWM
- 2 x SPI
- I / O (64 inputs, 64 outputs)
- 8 MiB SDRAM (ECC), 4 MiB Flash
- Access to Com. system memory and peripheral devices
Com-System
- 1x 32 bit IP core
- Peripheral devices
- 4 x UART (2 KiB Rx/Tx FIFO)
- 2 x CAN
- 2 x SPI
- I2C
- GPIO (16 inputs/outputs)
- 2 x Fast Ethernet
- 8 MiB SDRAM (ECC), 4 MiB Flash