M. Sc. Pascal Plettenberg

Graphs in Artificial Intelligence and Neural Networks (GAIN)

E-Mail: plettenberg[at]uni-kassel[dot]de

Standort: Wilhelmshöher Allee 67
34121 Kassel

Raum: WA 67, Room 2107

Forschungsgruppe "Graphs in Artificial Intelligence and Neural Networks" (GAIN) (öffnet neues Fenster)

Publikationen

[ 2025 ]

2025[ to top ]

Graph Neural Networks for Automatic Addition of Optimizing Components in Printed Circuit Board Schematics.Plettenberg, Pascal; Alcalde, André; Sick, Bernhard; Thomas, Josephine M. In European Conference on Machine Learning and Principles and Practice of Knowledge Discovery in Databases (ECMLPKDD), bll 508–524. Springer, 2025.
- [ Abstract ]
- [ BibTeX ]
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The design and optimization of Printed Circuit Board (PCB) schematics is crucial for the development of high-quality electronic devices. Thereby, an important task is to optimize drafts by adding components that improve the robustness and reliability of the circuit, e.g., pull-up resistors or decoupling capacitors. Since there is a shortage of skilled engineers and manual optimizations are very time-consuming, these best practices are often neglected. However, this typically leads to higher costs for troubleshooting in later development stages as well as shortened product life cycles, resulting in an increased amount of electronic waste that is difficult to recycle. Here, we present an approach for automating the addition of new components into PCB schematics by representing them as bipartite graphs and utilizing a node pair prediction model based on Graph Neural Networks (GNNs). We apply our approach to three highly relevant PCB design optimization tasks and compare the performance of several popular GNN architectures on realworld datasets labeled by human experts. We show that GNNs can solve these problems with high accuracy and demonstrate that our approach offers the potential to automate PCB design optimizations in a timeand cost-efficient manner.
@inproceedings{plettenberg2025graph, abstract = {The design and optimization of Printed Circuit Board (PCB) schematics is crucial for the development of high-quality electronic devices. Thereby, an important task is to optimize drafts by adding components that improve the robustness and reliability of the circuit, e.g., pull-up resistors or decoupling capacitors. Since there is a shortage of skilled engineers and manual optimizations are very time-consuming, these best practices are often neglected. However, this typically leads to higher costs for troubleshooting in later development stages as well as shortened product life cycles, resulting in an increased amount of electronic waste that is difficult to recycle. Here, we present an approach for automating the addition of new components into PCB schematics by representing them as bipartite graphs and utilizing a node pair prediction model based on Graph Neural Networks (GNNs). We apply our approach to three highly relevant PCB design optimization tasks and compare the performance of several popular GNN architectures on realworld datasets labeled by human experts. We show that GNNs can solve these problems with high accuracy and demonstrate that our approach offers the potential to automate PCB design optimizations in a timeand cost-efficient manner.}, author = {Plettenberg, Pascal and Alcalde, André and Sick, Bernhard and Thomas, Josephine M.}, booktitle = {European Conference on Machine Learning and Principles and Practice of Knowledge Discovery in Databases (ECMLPKDD)}, keywords = {PrintedCircuitBoards}, pages = {508–524}, publisher = {Springer}, title = {Graph Neural Networks for Automatic Addition of Optimizing Components in Printed Circuit Board Schematics}, year = 2025 }
%0 Conference Paper %1 plettenberg2025graph %A Plettenberg, Pascal %A Alcalde, André %A Sick, Bernhard %A Thomas, Josephine M. %B European Conference on Machine Learning and Principles and Practice of Knowledge Discovery in Databases (ECMLPKDD) %D 2025 %I Springer %P 508--524 %R 10.1007/978-3-662-72243-5_29 %T Graph Neural Networks for Automatic Addition of Optimizing Components in Printed Circuit Board Schematics %U https://link.springer.com/chapter/10.1007/978-3-662-72243-5_29 %X The design and optimization of Printed Circuit Board (PCB) schematics is crucial for the development of high-quality electronic devices. Thereby, an important task is to optimize drafts by adding components that improve the robustness and reliability of the circuit, e.g., pull-up resistors or decoupling capacitors. Since there is a shortage of skilled engineers and manual optimizations are very time-consuming, these best practices are often neglected. However, this typically leads to higher costs for troubleshooting in later development stages as well as shortened product life cycles, resulting in an increased amount of electronic waste that is difficult to recycle. Here, we present an approach for automating the addition of new components into PCB schematics by representing them as bipartite graphs and utilizing a node pair prediction model based on Graph Neural Networks (GNNs). We apply our approach to three highly relevant PCB design optimization tasks and compare the performance of several popular GNN architectures on realworld datasets labeled by human experts. We show that GNNs can solve these problems with high accuracy and demonstrate that our approach offers the potential to automate PCB design optimizations in a timeand cost-efficient manner.