Seminars in the field of digital technology

Our seminars (Bachelor and Master) take place every semester.

For ECE Seminar see extra page in left menu!

For the Technology Assessment seminar, see menu item on the left.

In the research seminar, current topics from research are presented and then discussed. It usually takes place every 14 days in room 0334 (digital technology seminar room) and everyone is invited to take part. Bachelor's and Master's students can receive credit for the research seminar as long as they attend the lectures and give their own presentation on a given topic from the literature at the end. The lecture topics will be announced via the list. Visitors are always welcome!

The topics of the B.Sc. and M.Sc. seminars are related to our research work. This includes the design and optimization of digital circuits, reconfigurable hardware architectures and systems, runtime reconfiguration, system-on-chip design, FPGAs (field-programmable gate arrays), optimization algorithms (C/C++, Java, Matlab etc.), UniKopter...

In addition, we also deal with software implementations on mobile devices (tablet computers and smartphones) in the field of teaching and teaching operations, e.g. for lecture surveys, teaching and learning software, etc.

Your own suggestions for topics are always welcome!

If you are interested or have any questions, please send us an e-mail!(e-mail to Prof. Zipf)

This semester, the following topics from the field of our research work will be offered:

• Concepts and structures for dynamic runtime reconfiguration (Master ET and Computer Science)
  Contents: Concepts of runtime reconfiguration of hardware and FPGAs, special hardware structures, reconfiguration techniques and mechanisms
  
• Reconfigurable hardware architectures and systems (Bachelor ET and Computer Science)
  Contents: Fundamentals of reconfigurable hardware and FPGAs, various FPGA architectures, reconfigurable architectures in research
  
  
• System-on-chip design (topics available for Master's and Bachelor's seminars in ET and Computer Science)
  Contents: Multiprocessor system-on-chips (MPSoC), network-on-chips (NoC), on-chip bus systems, symmetric multiprocessing (SMP), system design/tools, system structures
  
• Further topics, e.g. computer arithmetic or similar, can be arranged on request

The proof of performance will be a combination of your written paper and a presentation of your work. The exact modalities will be announced in the course.