Circuit design with HDLs

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The course will be held during the summer semester.

Dates: -

Structure: 6 CP, 2V+2Ü, 4 SWS

Contents and goals

In a combination of lecture and computer exercises, a hardware description language is learned and the developed designs are synthesized on an FPGA board. Contents of the course include syntax and semantics of HDL, various modeling options, description of standard functionalities (switching networks, state machines, data path functionality), and synthesis of concrete circuits with commercial CAD software.

This course is aimed at master's students of computer science, electrical engineering and mechatronics with an interest in technical computer science or information and communication technology (ICT) and a strong interest in digital hardware design.

Learning Objectives: The learner will be able to

  • name basic elements of a hardware description language,
  • explain how the language elements work,
  • interpret circuits described in a HDL,
  • design descriptions of standard circuits in a HDL,
  • implement designs using synthesis software.


An extensive collection of materials will be provided for the lecture. All materials as well as a discussion forum can be found in Moodle. 

All course materials as well as a discussion forum can be found in the Moodle course of the lecture. Please be sure to enroll in this course if you wish to attend.

There is no current Moodle course available at the moment!

Literature: The following textbooks will be used in the course

  • Peter Ashenden: The Designer's Guide to VHDL, Morgan Kaufmann; 3rd edition, 2006.
  • Paul Molitor, Jörg Ritter: VHDL: An Introduction, Pearson Studium, 2004
  • Jürgen Reichardt, Bernd Schwarz: VHDL Synthesis: Design of Digital Circuits and Systems, Oldenbourg, 5th edition, 2009
  • Frank Kesel, Ruben Bartholomä: Design of Digital Circuits and Systems with HDLs and FPGAs: Introduction with VHDL and SystemC, Oldenbourg; 2nd edition, 2009

Further literature will be announced in the lecture.