VHDL course and internship

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This course is intended for Bachelor students (2V+2Ü, 6 CP). As a Master (Computer Science) please enroll in the course "Circuit Design with HDLs" (2V+2Ü, 6 CP)

General notes

The VHDL course as well as the VHDL practical course are two thematically related courses that can be taken independently of each other. They deal with the design and synthesis of modern digital circuits using a hardware description language (VHDL).

These courses are offered in complementary alternation with courses of the department "Computer Architecture and Systems Programming", so that both courses are held in each semester. The course offered in the summer semester corresponds to the course "Selected Chapters of Computer Architecture" (LV-Nr. FB16-6804); the practical course in the winter semester corresponds to the course "Selected Chapters of Computer Technology and Microprocessor Technology" (LV-Nr. FB16-yyy).

Please note that our courses are only creditable if you have not yet completed Prof. Börcsök's courses.

Contents and goals

The course is primarily aimed at computer scientists, electrical engineers and mechatronics engineers with a focus on "technical computer science" or with an interest in modern design methods in microelectronics.

VHDL course

In the VHDL course, the hardware description language VHDL is learned in a combination of lecture and computer exercises and the developed designs are synthesized on an FPGA board. Contents of the course include syntax and semantics of VHDL, various modeling options, description of standard functionalities (switching networks, state machines, data path functionality) and synthesis of concrete circuits with commercial CAD software.

VHDL practical course

In the VHDL practical course, the skills gained are deepened and consolidated within a somewhat larger hardware design project. Based on the modeling of a processor model with pipelining, system modeling in VHDL, simulation and validation of the created models, synthesis on a standard cell library, characterization of the implementation as well as testing of the models on a prototype hardware will be contents of the practical course.


Extensive materials will be provided in Moodle for the course as well as for the lab. Please make sure to register with your respective Moodle course.

All course materials as well as a discussion forum can be found in the Moodle course of the respective event. Please be sure to register for it in Moodle.


The VHDL course takes place every summer semester Wednesdays between 10:00 and 13:00 in room WA -1201 (CIP pool). 

The VHDL practical course takes place every winter semester on Mondays between 10:00 and 13:00 in room WA 0334 (seminar room of the FG).

In the case of the internship, this time is more like "supervised pool time." 


  • Volnei A. Pedroni: Circuit Design And Simulation With VHDL; Mit Press Ltd,   Second Edition, (November 2, 2010). ISBN: 0262014335

In addition, the following books are relevant to the lecture content:


  • Jürgen Reichardt, Bernd Schwarz: VHDL-Synthesis: Design of Digital Circuits and Systems, Oldenbourg; Edition: 5th, updated ed. (July 29, 2009), ISBN: 3486589873 
  • Frank Kesel, Ruben Bartholomä: Design of digital circuits and systems with HDLs and FPGAs: introduction with VHDL and SystemC, Oldenbourg; edition: 2nd, corrected ed. (January 28, 2009), ISBN: 3486589768. 
  • Peter Ashenden: The Designer's Guide to VHDL, Morgan Kaufmann; edition: 3rd revised edition. (November 11, 2006), ISBN: 0120887851
  •  Paul Molitor, Jörg Ritter:VHDL: An Introduction, Pearson Studium (April 27, 2004), ISBN: 3827370477  

Proof of performance

The certificate of achievement in both courses is a combination of an oral examination and the submission of a term paper (report, source code created). The exact modalities will be announced in the respective course.